It is known in the prior art to use a voltage controlled oscillator (VCO) in conjunction with a phase locked loop (PLL) to synchronize an internal clock (or oscillator) with a reference clock (or oscillator). In normal phase locked loops, the oscillator frequency changes continuously with voltage. Thus, it is possible to find a voltage that results in an oscillator frequency that precisely matches the frequency of a reference oscillator.
However, in the digital domain, a precise match cannot always be obtained because of the inherent obstacles presented by using discrete elements. Therefore, the normal phase locked loop would result in having an output that jumps back and forth from frequencies that are too high to frequencies that are too low, because normally there would be no exact match.
Other methods known in the prior art include using the transconductance of a bipolar transistor. These methods usually result in current controlled oscillators that use normal phase locked loops operating in the analog domain.
Various other methods are disclosed by Yannis P. Tsividis in "Integrated Continuous-Time Filter Design--An Overview", IEEE Journal of Solid-State Devices, Vol. 29, No. 3, (March 1994).